Image pick-up device and camera system comprising an image pick-up device

ABSTRACT

The invention relates to an image pick up device ( 401 ) with pixels arranged in rows and columns. Every pixel ( 301 ) comprises a photosensitive element ( 302 ), a floating diffusion ( 304 ), a transfer transistor ( 303 ), an amplifying transistor ( 305 ) having its control electrode connected to the floating diffusion ( 304 ), and a reset transistor ( 306 ). An external node ( 310 ) is coupled to a selection switch via a row selection bus ( 406 ). The selection switch ( 411 ) provides either a first bias voltage, generated by a first voltage source ( 409 ), or a second bias voltage, generated by a second volt age source ( 410 ), to the row selection bus ( 406 ). Applying the first bias voltage and simultaneously turning on the reset transistor ( 306 ) programs the floating diffusion ( 304 ) to the first bias voltage which biases the amplifying transistor ( 305 ) in an on-mode, thereby selecting the pixel ( 301 ). Likewise, applying the second bias voltage biases, the amplifying transistor ( 305 ) in an off-mode, thereby deselecting the pixel ( 301 ). This way of selecting and deselecting pixels avoids the need for a separate selection transistor in every pixel, thereby increasing the fill factor of the pixels. This approach is especially useful for image pick up devices applying correlated double sampling (CDS).

The invention relates to an image pick-up device comprising a pluralityof pixels, at least one pixel comprising a photosensitive element forconverting light into an electrical charge, a charge-to-voltageconversion node for converting said electrical charge into a voltagelevel, a transfer transistor having its main conductive channelconnected between said photosensitive element and said charge-to-voltageconversion node, an amplifying transistor having its control electrodeconnected to said charge-to-voltage conversion node and its mainconductive channel connected to a first external node of said pixel andcoupled to a second external node of said pixel, and a reset transistorhaving its main conductive channel connected between saidcharge-to-voltage conversion node and said second external node.

The invention also relates to a camera system comprising optical meansto focus an image on an image section of an image pick-up device.

Such an image pick-up device is commonly known as an Active Pixel Sensor(APS) imager. Such APS imagers are usually realized as solid stateimagers in a Complementary Metal-Oxide Semiconductor (CMOS) integratedcircuit (IC) process. In normal use an APS imager may be part of acamera system, for example, a Digital Still Camera, a webcam, a videocamera recorder (camcorder), or a mobile application such as a cellularphone.

In its basic form an APS imager consists of an imaging section and aread-out section. The imaging section comprises a matrix of so-calledpicture elements or pixels which are arranged in rows and columns. Anexample of a conventional pixel is shown in FIG. 1. Such a pixel is alsoknown as a “4T-pixel”. Optical means project an image on the imagesection. Each pixel is arranged to convert incident light into anelectrical signal by means of a photosensitive element, generally beinga photodiode or a photogate. The photosensitive element generates anelectrical charge every time it is exposed to light. After exposure thischarge is transferred to a charge-to-voltage conversion node, e.g. afloating diffusion. The voltage level of the floating diffusion isproportional to the charge stored on it. This charge is the sum of thecharge collected by the photosensitive element and a so-called zerolight level charge generated by noise sources. Using a source followeror amplifying transistor, the voltage level of the floating diffusion iscopied to the source of the source follower transistor which is coupledto a first external node of the pixel. The drain of the source followertransistor is connected to a second external node of the pixel which isused for biasing purposes.

Using a sample & hold (SH) circuit in the read-out section of theimager, the voltage of the first external node of the pixel (the pixelsignal), is sampled for further processing. To increase the performanceof the pixel, Correlated Double Sampling (CDS) may be applied. In an APSimager applying CDS first the zero light voltage level of the floatingdiffusion is sampled and then the voltage level of the floatingdiffusion after the light collected by the photosensitive element hasbeen transferred. The influence of the noise, reflected in the zerolight level charge, is eliminated by subtracting the first sample fromthe second sample. This requires a transfer transistor within the pixelthat controls the charge transfer from the photosensitive element to thefloating diffusion.

Furthermore, APS imagers are usually read out on a row by row basiswhere every column of pixels shares the same SH circuit. To preventmixing of pixel signals of different pixels in one column, conventialAPS imagers comprise a selection transistor, the main conductive channelof which couples the source of the source follower transistor to thefirst external node of the pixel.

Finally, the voltage level of the floating diffusion needs to be resetto a predetermined level before the pixel signal can be read out again.To this end, the pixel comprises a reset gate, usually a resettransistor, whose main conductive channel connects the floatingdiffusion and the second external node of the pixel.

As a result of the number of transistors required, the fill factor of apixel in a conventional CDS APS imager is relatively low. This meansthat a relatively small area of a pixel is available for thephotosensitive element. The remaining area is mostly taken up by thetransistors and the wiring necessary to connect these transistors to theread-out section. Furthermore, the minimum area of a pixel is determinedlargely by the number of transistors within a pixel. The conventionalpixel thus has the disadvantage that it limits the number of pixels thatfit on a given area of an image section, hereby limiting the feasibleresolution of the CDS APS imager. European Patent Application EP-A 1 017107 discloses a solution for CDS APS imagers with photogates asphotosensitive elements. A pixel according to this EP-A 1 017 107 isshown in FIG. 2. In the pixel disclosed therein the selection transistorhas been eliminated. Instead the floating diffusion of the pixel is usedto bias the source follower transistor in an off-state, therebydeselecting the pixel, and in an on-state wherein it functions as asource follower, thereby selecting the pixel. To this end, the drain ofthe reset transistor is coupled to a voltage source controlling theoperation of the photogate. The source follower transistor is biasedeither in its off-mode or its on-mode by applying the appropriate biasvoltage level via this voltage source and by simultaneously turning onthe reset transistor. However, since the specific operation of thephotogate is utilized, the disclosed solution is only applicable to CDSAPS imagers that utilize photogates.

It is inter alia an object of the invention to provide an image pick updevice comprising a pixel with an increased fill factor whereinphotodiodes may be used as photosensitive elements.

To this end, the invention provides an image pick-up device as definedin the opening paragraph which is characterized in that said secondexternal node is coupled to biasing means for providing at least twodifferent voltage levels to said charge-to-voltage conversion node inorder to bias said amplifying transistor in an off-mode and in anon-mode, respectively.

The voltage applied to the control electrode of said amplifyingtransistor determines the mode of operation of the amplifyingtransistor. Application of a first voltage level to the controlelectrode of the amplifying transistor ensures that no electric currentcan flow through the main conductive channel of the amplifyingtransistor. The amplifying transistor is then biased in an off-mode.Thus, by providing said first voltage level to the charge-to-voltageconversion node of said pixel it is ensured that the pixel does notgenerate a pixel signal. Application of a second voltage level to thecontrol electrode of the amplifying transistor ensures that an electriccurrent can flow through the main conductive channel of the amplifyingtransistor. The amplifying transistor is then biased in an on-mode.Thus, by providing said second voltage level to the charge-to-voltageconversion node of said pixel it is ensured that the pixel generates apixel signal. Summarizing, said pixel is deselected and selected byproviding said first and said second voltage level, respectively, to thecharge-to-voltage conversion node. This eliminates the need for aselection transistor, thus resulting in a pixel with an increased fillfactor wherein photodiodes may be used as photo sensitive elements.

An embodiment of the image pick up device according to the invention ischaracterized in that said pixels are arranged in rows and columns whichconstitute a matrix, the second external nodes of pixels within a rowbeing connected to a row selection bus. Arranging the pixels in rows andcolumns and connecting the second external nodes of pixels within a rowto the same row selection bus enables pixels to be selected anddeselected on a row by row basis. In this way one row of pixels may beselected while the remaining rows may be deselected. This ensures thatonly one pixel is selected within every column while the remainingpixels in the column are deselected. Providing one SH circuit per columnenables the pixels to be read-out on a row by row basis, since it isensured that every SH circuit receives the pixel signal of a singlepixel at its input.

A further embodiment of the image pick up device according to theinvention is characterized in that said biasing means comprise a firstvoltage source for providing a first bias voltage, a second voltagesource for providing a second bias voltage, and a selection switch forcoupling either said first voltage source or said second voltage sourceto said row selection bus. Said selection switch ensures that only thebias voltage of one voltage source is provided to said row selection busand hence to the charge-to-voltage conversion nodes of the pixelsconnected to the row selection bus. It is relatively easy to design andrealize such a selection switch in the IC technology wherein the APSimage pick-up device is realized. Furthermore, it is relatively easy toprovide for voltage sources which supply the first and second biasvoltages, respectively. The voltage sources may be part of the APS imagepick up device itself or may be external voltage sources which arecoupled to the selection switch in a usual way. The first bias voltageis chosen such that, if provided to the floating diffusion, it biasesthe amplifying transistor in the off-mode, while the second bias voltageis chosen such that, if provided to the floating diffusion, it biasesthe amplifying transistor in the on-mode.

A camera system according to the invention is characterized in that itcomprises an image pick-up device according to the invention. In such acamera system images are projected via optical means, on to the imagesection of the image pick-up device. An advantage of such a camerasystem is that it has a higher sensitivity, because the pixels withinthe image pick-up device have an increased fill factor. Therefore, itmay be used under lighting conditions that are too poor for conventionalcamera systems.

These and other aspects of the invention will be apparent from andelucidated, by way of example, with reference to the following drawings.

FIG. 1 is a diagram showing a pixel of a known image pick-up device;

FIG. 2 is a diagram showing a pixel of a further known image pick-updevice;

FIG. 3 is a diagram showing a pixel of an image pick-up device accordingto the invention;

FIG. 4 is a schematic overview of an image pick-up device according tothe invention;

FIG. 5 is a schematic overview of a camera system according to theinvention.

In these Figures corresponding parts are denoted by correspondingreferences.

FIG. 1 is a diagram showing a pixel of a known image pick-up device. Thepixel 101 is also known as a “4T-pixel”. It comprises a photodiode 102,a transfer transistor 103, a floating diffusion 104, a source followertransistor 105, a reset transistor 106, and a selection transistor 107.In the shown embodiment all transistors are MOSFETs. The anode of thephotodiode 102 is connected to ground. The cathode of the photodiode 102is connected to the floating diffusion 104 via the transfer transistor103. The operation of the transfer transistor 103 is controlled by atransfer signal applied to the transfer gate 108. The gate of the sourcefollower transistor 105 is connected to the floating diffusion 104. Thesource of the source follower transistor 105 is connected to the drainof the selection transistor 107. The drain of the source followertransistor 105 is connected to the drain of the reset transistor 106 andto the second external node 112 of the pixel. The source of the resettransistor 106 is connected to the floating diffusion 104. The operationof the reset transistor 106 is controlled by a reset signal applied tothe reset gate 109. The source of the selection transistor 107 isconnected to the first external node 111 of the pixel. The operation ofthe selection transistor 107 is controlled by a selection signal appliedto the selection gate 110. The second external node 112 of the pixel iscoupled to a DC voltage source, not shown in FIG. 1, that provides areference voltage, V_(HIGH). V_(HIGH) is usually lower than the positivepower supply. However, for practical reasons it may be advantageous tochoose V_(HIGH) equal to the power supply voltage. The first externalnode 111 of the pixel is connected to a sample and hold circuit (SHcircuit), in the read-out section of the image sensor.

Depending on the voltage level present at the transfer gate 108, aconductive channel is present or absent between the cathode of thephotodiode 102 and the floating diffusion 104. In the presence of aconductive channel, the charge collected by the photodiode 102 istransferred to the floating diffusion 104.

During a predetermined integration time charge is collected in thephotodiode 102. This charge is generated by the energy of the light thatreaches the photodiode 102. At the end of the integration time, thecollected charge is transferred from the photodiode 102 to the floatingdiffusion 104 by applying a pulse signal to the transfer gate 108.Before the charge is transferred to the floating diffusion 104, thefloating diffusion 104 is set to a predefined state by applying a resetsignal to the reset gate 109. Subsequently, the selection transistor 107is turned on by applying a selection signal at the gate 110 and byproviding a predetermined current through the conductive channel of thesource follower transistor 105. As a result, the voltage level of thefloating diffusion 104 is copied (with a DC-shift) to the first externalnode 111 of the pixel where it is sampled by the SH circuit in theread-out section of the image sensor. The first sample represents thereference level of the floating diffusion. Subsequently, the chargecollected in the photodiode 102 is transferred to the floating diffusion104. This charge dump results in a change in voltage level of thefloating diffusion 104 that is proportional to the amount of chargecollected by the photodiode 102. The voltage level of the floatingdiffusion 104 is copied (with a DC-shift) to the first external node 111of the pixel where it is sampled by the SH circuit in the read-outsection. This second sample is a summation of the reference level andthe signal level of the floating diffusion 104. After the charge hasbeen transferred from the photodiode 102 to the floating diffusion 104,the next integration period of the photodiode 102 starts.

When the first sample is substracted from the second sample, just thesignal level of the floating diffusion 104 remains; it is proportionalto the amount of charge collected by the photodiode. This is theprinciple of Correlated Double Sampling (CDS). CDS has the advantagethat it suppresses reset and 1/f noise. This results in an optimal noiseperformance of the pixel and hence of the image sensor.

An important factor in the performance of a solid-state imager, such asa CMOS imager, is the fill factor of a pixel. The fill factor is theratio of the photo sensitive area of the photodiode to the area of apixel as a whole. The larger the photo sensitive area of the photodiode,the more charge can be stored therein. The more charge can be stored ina pixel, the higher its dynamic range will be. A disadvantage of CMOSimagers as described above is that they have a relatively low fillfactor.

FIG. 2 is a diagram showing a pixel as disclosed in EP-A 1 017 107. Thepixel 201 comprises a photogate 202, a transfer transistor 203, afloating diffusion 204, a source follower transistor 206, and a resettransistor 205. The photogate is connected to ground and, via thetransfer transistor 203, to the floating diffusion 204. The operation ofthe photogate 202 is controlled by a signal applied to the controlterminal 207. The operation of the transfer transistor 203 is controlledby a transfer signal applied to the transfer gate 208. The gate of thesource follower transistor 206 is connected to the floating diffusion204. The source of the source follower transistor 206 is connected to afirst external node 210 of the pixel. The drain of the source followertransistor 206 is connected to a second external node 211 of the pixel.The source of the reset transistor 205 is connected to the floatingdiffusion 204. The drain of the reset transistor 205 is connected to thecontrol terminal 207. The operation of the reset transistor 205 iscontrolled by a reset signal applied to the reset gate 209. Alltransistors in this embodiment are MOSFETs.

The basic operation of the pixel 201 is similar to that of the pixel 101shown in FIG. 1. During a predetermined integration time, charge iscollected in the photogate 202. This charge is generated by the energyof the light that reaches the photogate 202. At the end of theintegration time, the collected charge is transferred from the photogate202 to the floating diffusion 204 by applying a pulse signal to thetransfer gate 208. This results in a change of voltage level of thefloating diffusion 204. Line in the pixel 101 shown in FIG. 1 thevoltage level of the floating diffusion 204 is copied to the firstexternal node 210 of the pixel 201 by means of the source followertransistor 206.

The pixel selection mechanism is different from that of the pixel 101shown in FIG. 1. Whereas in FIG. 1 the pixel 101 is selected anddeselected by means of the selection transistor 107, no such selectiontransistor is present in the pixel 201 of FIG. 2. Instead the sourcefollower transistor 206 is biased to an off-mode by applying a givenvoltage level to the floating diffusion 204 in order to deselect thepixel. Likewise, the source follower transistor 206 is biased to anon-mode by applying another voltage level to the floating diffusion 204.Applying the aforementioned voltages to the floating diffusion isachieved by means of the control terminal 207 which is used to controlthe operation of the photogate 202. Bias voltages are applied to thefloating diffusion 204 by applying the appropriate bias voltage to thecontrol terminal and by turning on the reset transistor 205.

The pixel 201 has the advantage over the pixel 101 that it saves aselection transistor, thus increasing the fill factor. The cleardisadvantage of pixel 201 is that it requires a photogate as aphotosensitive element.

FIG. 3 is a diagram showing a pixel of an image pick-up device accordingto the invention. The pixel 301 comprises a photodiode 302, a transfertransistor 303, a floating diffusion 304, a source follower transistor305, and a reset transistor 306. The anode of the photodiode 302 isconnected to ground. The cathode of the photodiode 302 is connected tothe floating diffusion 304 via the transfer transistor 303. Theoperation of the transfer transistor 303 is controlled by a transfersignal applied to the transfer gate 307. The gate of the source followertransistor 305 is connected to the floating diffusion 304. The source ofthe source follower transistor 305 is connected to a first external node309 of the pixel 301. The drain of the source follower transistor 305 isconnected to the drain of the reset transistor 306 and to a secondexternal node 310 of the pixel 301. The source of the reset transistor306 is connected to the floating diffusion 304. The operation of thereset transistor 306 is controlled by a reset signal applied to thereset gate 308. The transistors in this embodiment are all InsulatedGate Field Effect Transistors (IGFETs). It may be advantageous to applyMOSFETs, although other types of IGFETs may also be applied.

The difference with respect to the pixel 101 shown in FIG. 1 consists inthe absence of a selection transistor. In practice pixels in an imagepick-up device are selected on a row by row basis and not pixel bypixel. Thus it is allowed to remove the selection transistor from thepixel if the addressing and activation required to read a row of pixelsis transferred completely to control and selection means within theread-out section. By keeping the total area of a pixel the same, it willbe clear that the area available for the photosensitive element, in thiscase the photodiode, increases. Thus the fill factor of the pixel 301 ishigher than the fill factor of the pixel 101. FIG. 4 illustrates howthis can be accomplished. Furthermore FIG. 4 explains more in detail thefunctioning of the pixel 301.

The pixel 201 as shown in FIG. 2 only offers the advantage of anincreased fill factor for APS imagers utilizing photogates asphotosensitive elements. Through a reduction of components the pixel 301realizes this advantage for APS imagers using photodiodes asphotosensitive elements. An additional advantage of the pixel 301 withrespect to the pixel 201 is that the photodiode 302 functionally may bereplaced by a photogate. Thus, this design can be advantageously appliedboth in APS imagers utilizing photodiodes and in APS imagers utilizingphotogates.

It may be advantageous to functionally replace the floating diffusion304 by a floating gate or another capacitive element that is capable ofconverting charge-to-voltage. Furthermore, when a photodiode with apinned surface is used, surface leakage currents, will be diverted. Thishas the additional advantage that a substantial reduction in darkcurrent can be obtained.

Depending on other design choices it may advantageous to realize thepixel 301 while utilizing P-MOSFETs instead of N-MOSFETs as shown inFIG. 3. In that case the biasing of the photodiode, or photogate, shouldbe adapted accordingly.

FIG. 4 is a schematic overview of an image pick up device according tothe invention. The image pick-up device 401 comprises an image section402 and a read-out section 403.

The image section 402 comprises a plurality of pixels 301 arranged in amatrix of rows and columns. The image section 402 also comprises aplurality of transfer buses, a plurality of reset buses, and a pluralityof row select buses. Each row of pixels 301 has its own transfer bus404, reset bus 405 and row select bus 406. The transfer gates 307 of thepixels 301 located in the same row are connected to the same transferbus 404; the reset gates 308 of the pixels 301 located in the same roware connected to the same reset bus 405 and the second external nodes310 of the pixels 301 located in the same row are connected to the samerow select bus 406. The image section 402 also comprises a plurality ofread-out buses. Each column of pixels 301 has its own read-out bus 407.The first external nodes 309 of the pixels 301 located in the samecolumn are connected to the same read-out bus 407. This arrangement ofbuses enables the pixels to be read-out on a row by row basis by firstselecting one row of pixels and deselecting the remaining rows and thenreading out the pixel signals of the selected pixel in every column.

The read-out section 403 comprises a control and selection block 408which comprises electronic circuits which are arranged to select andcontrol the operation of the pixels 301 on a row by row basis.Furthermore, the read-out section 403 comprises a first DC voltagesource 409, which is arranged to apply a first DC voltage, V_(HIGH), asecond DC voltage source 410, which is arranged to apply a second DCvoltage, V_(LOW), and a plurality of selection switches. Each selectionswitch 411 is coupled to one row select bus 406, the first voltagesource 409, and the second voltage source 410. In a first mode ofoperation the switch 411 electrically couples the row selection bus 406to the first voltage source 409 and in a second mode of operation theswitch 411 electrically couples the row selection bus 406 to the secondvoltage source 410. The control and selection block 408 determineswhether the switch 411 operates in the first mode or in the second mode.

The read-out section further comprises a plurality of sample and holdcircuits 412. Each sample and hold circuit comprises an input 419, whichis connected to a read-out bus 407, and an output 413. Each sample andhold circuit also comprises a first switch 414 and a first holdcapacitor 415, a second switch 416 and a second hold capacitor 417, anda differential amplifier 418. The first hold capacitor 415 is connectedto a first input of the differential amplifier and coupled to theread-out bus 407 via the first switch 414. The second hold capacitor 417is connected to a second input of the differential amplifier and coupledto the read-out bus 407 via the second switch 416. The output of thedifferential amplifier 418 forms the output 413 of the sample and holdcircuit.

In operation the sample and hold circuit 412 performs correlated doublesampling to read out the pixels 301. By means of the first switch 414and the first hold capacitor 415 there is stored a first sample thatrepresents the reference level of the floating diffusion 304 of thepixel 301 being read out. By means of the second switch 416 and thesecond hold capacitor 417 there is stored a second sample thatrepresents the summation of the reference level and the signal level ofthe floating diffusion of the pixel 301 being read out. The differentialamplifier 418 substracts the first sample from the second sample. Theresultant difference is amplified and appears as a pixel output signalat the output 413 of the sample and hold circuit 412.

A pixel is selected and deselected by programming or setting the voltagelevel of the floating diffusion 304. The source follower transistor 305is effectively turned off by programming the voltage level of thefloating diffusion 304 of a pixel 301 to V_(LOW), thereby deselectingthat pixel. The source follower transistor 305 is effectively turned onby programming the voltage level of the floating diffusion 304 toV_(HIGH). V_(LOW) and V_(HIGH) have to be chosen such that the resultantgate-source voltage of the source follower transistor 305 is well belowthe threshold voltage in case the floating diffusion 304 is programmedto V_(LOW) and is well above the threshold voltage in case the floatingdiffusion is programmed to V_(HIGH). In case P-MOSFETs are used insteadof the N-MOSFETs shown in FIG. 3 and FIG. 4, the values of V_(LOW) andV_(HIGH) have to be adjusted accordingly.

In operation a pixel 301 in the image pick-up device 401 may be read outin a way involving the following steps:

-   -   coupling all row select buses 406 to the voltage source 410 by        means of the switches 411, thereby applying V_(LOW) to all row        select buses;    -   applying a reset signal to all reset buses 405, thereby        programming the floating diffusion 304 of all pixels 301 to        V_(LOW), thus effectively turning off the source follower        transistor 305 of all pixels;    -   coupling the row selection bus 406 of the row of pixels 301 to        be read out to the voltage source 409 by means of the switch        411, thereby applying V_(HIGH) to the row selection bus 406 of        the row of pixels to be read out;    -   applying a reset signal to the reset bus 406 of the row of        pixels 301 to be read out, thereby programming the floating        diffusion 304 of these pixels to V_(HIGH), thus effectively        turning on the source follower transistor 305 of the pixels to        be read out;    -   sampling the reference level of the floating diffusion 304 of        the pixels 301 to be read out;    -   transferring the charge stored in the photodiode 302 to the        floating diffusion 304 of the pixels 301 to be read out;    -   sampling the signal plus reference level of the floating        diffusion 304 of the pixels 301 to be read out.

The foregoing is an example of how the pixels 301 of the image pick-updevice 401 can be read out. It will be clear to a person skilled in theart that this is not the only way and that other ways offeringsubstantially the same result are possible.

FIG. 5 is a schematic overview of a camera system according to theinvention. The camera system 501 comprises optical means (not shown) tofocus images on an image section 505 of an image pick-up device 502, adigital signal processor 503, and a controller 504. The image pick-updevice 502 converts images projected onto the image section 505 intoelectrical output signals which are digitized, converted to a suitableformat and transmitted to the digital signal processor 503. The digitalsignal processor 503 performs a number of processing steps, including,for example, color corrections, image format adaptation, or imagecoding, prior to transmission or storage on suitable means, e.g. avideocassette or hard disk. This is not shown in FIG. 5. The controller504 co-ordinates the different tasks within the camera system 501.

The image pick-up device 502 is the image pick up device 401 shown inFIG. 4. It comprises a communication bus circuit 506 and otherelectronic circuitry 507, such as the image section 505 and a read-outsection 508. The digital signal processor 503 comprises a communicationbus circuit 509 and a DSP core 510 to carry out the actual signalprocessing. The controller 504 comprises a communication bus circuit 511and other electronic circuitry 512 to carry out the actual controltasks. The communication bus circuits 506, 509, and 511 are part of thesame communication bus. The communication bus facilitates thecommunication between the image pick-up device 502, the digital signalprocessor 503, and the controller 504.

It will be clear that alternative embodiments of a camera system withthe image pick-up device according to the invention are also possible. Abasic embodiment of such a camera system comprises just the opticalmeans to project an image on to the image section 505 of the imagepick-up device 502, whereas the pixel output signals are the outputsignals of the camera system. In a further alternative embodiment of acamera system with the image pick-up device according to the inventionthe image pick up device 502 and the digital signal processor 503 areintegrated in a single integrated circuit. In a further embodiment yetof a camera system with the image pick-up device according to theinvention the controller 504 and the bus system comprising the businterfaces 506, 509, and 511 are omitted.

Furthermore, it will be clear that the aforementioned images are imagesconstituted by electromagnetic radiation of wavelengths within the rangevisible to the human eye. The images could, for instance, also beinfrared images.

Summarizing, the invention relates to an image pick-up device 401 withpixels arranged in rows and columns. Every pixel 301 comprises aphotosensitive element 302, a floating diffusion 304, a transfertransistor 303, an amplifying transistor 305 having its controlelectrode connected to the floating diffusion 304, and a resettransistor 306. An external node 310 is coupled to a selection switchvia a row selection bus 406. The selection switch 411 provides either afirst bias voltage, generated by a first voltage source 409, or a secondbias voltage, generated by a second voltage source 410, to the rowselection bus 406. Applying the first bias voltage and simultaneouslyturning on the reset transistor 306 programs the floating diffusion 304to the first bias voltage which biases the amplifying transistor 305 inan on-mode, thereby selecting the pixel 301. Likewise, applying thesecond bias voltage biases the amplifying transistor 305 in an off-mode,thereby deselecting the pixel 301. This way of selecting and deselectingpixels avoids the need for a separate selection transistor in everypixel, thereby increasing the fill factor of the pixels. The approach isespecially useful for image pick up devices applying correlated doublesampling (CDS).

It is to be understood that the above description is intended to beillustrative and not restrictive. Many embodiments will be apparent tothose skilled in the art upon reviewing the above description. The scopeof the invention should, therefore, be determined not as reference tothe above description, but should instead be determined with referenceto the appended claims along with the full scope of equivalence to whichsuch claims are entitled.

For instance, based on design choices, it may be advantageous to readout the pixels on a pixel by pixel basis instead of on a row by rowbasis. This is facilitated by choosing means other than the rowselection bus 406 for coupling the second external node of the pixel 301to the first and second DC voltage sources.

For instance, a modification of the pixel 301 includes anti-bloomingmeans which consist of an additional transistor having its mainconductive channel coupled between the photosensitive element 302 and afurther DC voltage source to allow excess charge generated within thephotosensitive element to be removed without contributing to the pixelsignal, its control electrode being coupled to another further DCvoltage source which supplies a predetermined voltage level thatcontrols the maximum charge that can be stored within the photosensitiveelement.

1. An image pick up device (401) comprising a plurality of pixels, atleast one pixel (301) comprising a photosensitive element (302) forconverting light into an electrical charge, a charge-to-voltageconversion node (304) for converting said electrical charge into avoltage level, a transfer transistor (303) having its main conductivechannel connected between said photosensitive element (302) and saidcharge-to-voltage conversion node (304), an amplifying transistor (305)having its control electrode connected to said charge-to-voltageconversion node (304) and its main conductive channel connected to afirst external node (309) of said pixel and coupled to a second externalnode (310) of said pixel, and a reset transistor (306) having its mainconductive channel connected between said charge-to-voltage conversionnode (304) and said second external node (310), characterized in thatsaid second external node (310) is coupled to biasing means (406, 411,409, 410) for providing at least two different voltage levels to saidcharge-to-voltage conversion node (304) in order to bias said amplifyingtransistor (305) in an off-mode and in an on-mode, respectively.
 2. Animage pick up device according to claim 1, characterized in that saidpixels (301) are arranged in rows and columns which constitute a matrix,the second external nodes (310) of pixels within a row being connectedto a row selection bus (406).
 3. An image pick-up device according toclaim 2, characterized in that said biasing means comprise a firstvoltage source (409) for providing a first bias voltage, a secondvoltage source (410) for providing a second bias voltage source, and aselection switch (411) for coupling either said first voltage source(409) or said second voltage source (410) to said row selection bus(406).
 4. An image pick-up device according to claim 1, characterized inthat said photosensitive element (302) comprises a photodiode.
 5. Animage pick-up device according to claim 1, characterized in that saidphotosensitive element comprises a photogate.
 6. An image pick-up deviceaccording to claim 1, characterized in that said amplifying transistor(305) is an insulated gate field effect transistor.
 7. An image pick-updevice according to claim 1, characterized in that said reset transistor(306) is an insulated gate field effect transistor.
 8. An image pick-updevice according to claim 1, characterized in that said transfertransistor (303) is an insulated gate field effect transistor.
 9. Acamera system comprising optical means for focusing an image on to animage section (505) of an image pick-up device (502), characterized inthat said image pick up device (502) is an image pick-up deviceaccording to claim 1.